1. Field of the Invention
The present invention relates to supporting PCI Express. In one example, the present invention relates to methods and apparatus for implementing a device having both hard-coded and soft-coded PCI Express support.
2. Description of Related Art
PCI Express is a low-cost, scalable, switched, point-to-point, serial I/O interconnection scheme that maintains backward compatibility with PCI. PCI Express provides a number of benefits over existing bus standards, including increased bandwidth availability and support for real-time data transfer services. PCI Express provides quality of service, power management, and I/O virtualization features. Quality of service and power management improve data integrity and allow control of power consumption. I/O virtualization allows data to be routed along logical routes such as virtual channels, permits allocation of bandwidth to groups of devices, and provides the ability to prioritize traffic streams.
Many existing devices fail to fully and efficiently support PCI Express. Some devices only support PCI Express in very specific configurations. For example, some Application Specific Standard Products (ASSPs) and Application Specific Integrated Circuits (ASICs) may have PCI Express support but only for a specified number of channels. Some other devices such as programmable chips can support PCI Express but only by using a relatively large amount of logic resources.
Consequently, it is desirable to provide improved techniques and mechanisms for providing PCI Express support that overcome at least some of the limitations of existing devices.